Explainers · 2026-07-11 · Patreon guide

Patreon for electronics creators: tiers, circuit documentation, iOS rates, and the Apple Tax in 2026

Electronics Patreons retain because the audience faces a documentation gap that YouTube build videos structurally compress away: the video shows wiring and uploading a sketch, but it does not contain the pull-up resistor calculation, the SPI CPOL/CPHA mode rationale, the PCB trace width formula, or the RTOS task priority assignment that determined the actual design. The Patreon tier that keeps electronics patrons is the one with the annotated schematics, the component selection rationale, and the firmware configuration notes — not the most satisfying blink-the-LED close-up shot.

The electronics creator subtypes

Arduino and microcontroller educators: GPIO and peripheral configuration

Arduino and microcontroller educators serve an audience spanning beginners learning GPIO and basic circuits all the way to intermediate makers implementing sensor networks, motor control, and wireless communication. The documentation gap for microcontroller educators is the configuration rationale: pull-up resistor value selection (R_pullup = (Vcc − V_OL_max) / I_min for reliable logic low detection; standard 10 kΩ works for most CMOS GPIO at 3.3–5 V, but bus capacitance and I2C rise time requirements constrain the minimum value: t_rise = 0.8473 × C_bus × R_pullup; at 400 kHz I2C fast-mode, t_rise must be ≤300 ns, constraining R_pullup ≤ 300 ns / (0.8473 × C_bus)); bypass capacitor placement (100 nF X7R ceramic within 10 mm of each IC power pin to suppress high-frequency switching noise; additional 10 µF per rail for bulk capacitance); and interrupt configuration (RISING / FALLING / CHANGE edge selection rationale; software debounce vs RC filter hardware debounce; interrupt priority vs main loop latency).

Protocol configuration documentation: I2C (Inter-Integrated Circuit: open-drain two-wire bus, SDA data and SCL clock; standard mode 100 kHz, fast mode 400 kHz, fast-mode plus 1 MHz; 7-bit address space 0x08–0x77 for general use; address pins A0/A1/A2 on addressable peripherals set the lower 3 bits; clock stretching mechanism and its incompatibility with some STM32 HAL drivers); SPI (Serial Peripheral Interface: 4-wire full-duplex MOSI/MISO/SCLK/CS; CPOL/CPHA mode determines idle clock level and sample edge — Mode 0 CPOL=0 CPHA=0 samples MOSI on rising edge, idle low; Mode 3 CPOL=1 CPHA=1 samples on rising edge, idle high; always verify peripheral datasheet timing diagram against MCU SPI peripheral mode); UART (baud rate, data bits 8 or 9, parity NONE/EVEN/ODD, stop bits 1 or 2 — crystal oscillator frequency must divide evenly to produce target baud within <2% error to avoid UART framing errors at the end of long frames).

Three tiers work for microcontroller educators. The Breadboard tier ($5–8/month) provides project source files (Arduino .ino or PlatformIO project with platformio.ini, pinout diagram) and Discord #project-log. The Schematic tier ($15–22/month) adds annotated schematics (KiCad or EasyEDA, with net labels and component values), component selection rationale documents (resistor calculation, capacitor placement, IC alternatives), and protocol configuration notes (I2C pull-up calculation, SPI mode selection, UART error budget). The PCB Review tier ($60–80/month, capped 5 patrons) provides one-on-one schematic and PCB layout review with written feedback on design rule violations, component placement, and grounding strategy.

PCB designers and EE educators: schematic and layout documentation

PCB designers and EE educators serve an audience moving from breadboard prototypes to manufactured printed circuit boards — the transition that requires understanding schematic capture, PCB layout rules, Gerber file generation, and fabrication specifications. The documentation gap is the design decisions behind the layout: trace width calculation (IPC-2221 external trace: width = I / (k × ΔT^0.44 × area^0.725); for a 1 A trace with 10°C rise on outer copper: width ≈ 0.5 mm in 1 oz copper); via sizing (drill diameter + 0.2 mm annular ring = via pad diameter; current capacity of vias scales similarly to traces via effective cross-sectional area); ground plane strategy (solid copper pour on GND net, copper pour clearance to non-GND pads, thermal relief spoke count for hand-solderable pads); and design rule check (DRC) net class parameters (default clearance 0.15 mm minimum for standard fab tolerances; power net class 0.3 mm trace minimum; high-voltage net class 0.5 mm or more).

Controlled impedance documentation: for any signals operating above 30 MHz (USB 2.0, SPI above 25 MHz, differential USB/LVDS lines), PCB trace impedance must match the signal source impedance to prevent reflection. For USB 2.0 full-speed and high-speed differential pairs: target 90 Ω differential impedance; for a 2-layer FR4 board with H = 1.6 mm dielectric, trace width W and spacing S must satisfy the differential impedance formula; target W ≈ 1.8 mm with S = 0.2 mm for 90 Ω differential on 1.6 mm FR4 at 1 oz copper.

Embedded systems creators: firmware architecture and RTOS

Embedded systems creators serve an audience implementing production-quality firmware on ARM Cortex-M microcontrollers (STM32, ESP32, nRF52 series): RTOS task design (FreeRTOS task priority assignment — idle task priority 0, application tasks priority 1–5, time-critical ISR-deferred tasks priority 5–10; stack size allocation per task with configMINIMAL_STACK_SIZE as baseline; message queue and semaphore for task synchronization; priority inversion risk and mitigation via mutexes with priority inheritance); DMA (direct memory access) configuration (DMA channel priority, circular vs normal mode, half-transfer and transfer-complete interrupts for double-buffered ADC streaming; impact on cache coherency on Cortex-M7 with D-cache); bootloader and firmware update (STM32 system bootloader USART/USB DFU interface; linker script modification for dual-bank flash partition; CRC-32 firmware integrity check before jumping to application vector table). iOS rates for embedded systems YouTube: 42–58% iOS — among the lowest of any Patreon creator niche, because firmware development requires a desktop IDE and most viewers are coding along on their own machines.

Circuit and firmware documentation mechanics

Complete circuit documentation: schematic (KiCad .kicad_sch or EasyEDA JSON export with all net labels, power flags on all power nets, all component values filled, datasheet URL in Description field, and manufacturer part number in MPN field); BOM (bill of materials CSV: Reference, Value, Footprint, Quantity, MPN, Supplier, Unit Price, Total Price, Notes); power budget (table of all ICs and peripherals with quiescent and active current draw in mA, worst-case total, regulator output current rating, headroom margin); GPIO assignment table (pin number, pin name/function, peripheral, direction IN/OUT, logic level 3.3V/5V, pull-up/down, and any hardware protection diode or series resistor).

PCB documentation: layer stack-up (layer count, each copper layer oz/m², dielectric material FR4/Rogers, dielectric height H in mm, surface finish HASL/ENIG/OSP); net class table (class name, min trace width mm, min clearance mm, min via drill mm, min annular ring mm, differential pair gap mm if applicable); controlled impedance notes (net names requiring impedance control, target impedance Ω, calculated trace width and gap for specific stackup, tolerance ±10%); gerber file checklist (F_Cu, B_Cu, F_SilkS, B_SilkS, F_Mask, B_Mask, Edge_Cuts, drill file in Excellon format with leading zeros and mm/inch notation matching fab house requirements).

iOS rates and the Apple Tax

Electronics creator iOS rates by platform and content type: YouTube electronics tutorials (Arduino, Raspberry Pi, PCB design, embedded systems) 48–62% iOS — the lowest-iOS maker content category, because tutorials require following along with hardware on a desktop with the IDE open; Instagram electronics project showcases 68–78% iOS; TikTok electronics build content 72–82% iOS.

Frequently asked questions

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